Analog layout synthesis with knowledge mining

Po Hsun Wu, Po-Hung Lin, Tsung Yi Ho

研究成果: Conference contribution同行評審

14 引文 斯高帕斯(Scopus)

摘要

To reduce layout design time, analog layout designers prefer referring to legacy designs and layouts rather than starting from scratch, or thoroughly applying placement and routing tools because legacy layouts contain pretty much design expertise. Therefore, this paper presents the first knowledge-based layout synthesis methodology to generate new layouts by integrating existent design expertise contained in the quality-approved legacy layouts as much as possible. Experimental results show that the proposed methodology with knowledge mining can achieve high layout reusage rate and hence the designers' layout preference can be successfully reserved.

原文English
主出版物標題2015 European Conference on Circuit Theory and Design, ECCTD 2015
發行者Institute of Electrical and Electronics Engineers Inc.
頁面9-12
頁數4
ISBN(電子)9781479998777
DOIs
出版狀態Published - 24 八月 2015
事件European Conference on Circuit Theory and Design, ECCTD 2015 - Trondheim, Norway
持續時間: 24 八月 201526 八月 2015

出版系列

名字2015 European Conference on Circuit Theory and Design, ECCTD 2015

Conference

ConferenceEuropean Conference on Circuit Theory and Design, ECCTD 2015
國家Norway
城市Trondheim
期間24/08/1526/08/15

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