An event-driven incremental timing fault simulator

Shyh-Jye Jou, Wen Zen Shen, Shwu Huey Chiou

研究成果: Conference contribution同行評審

摘要

An efficient MOS multiple sets of multiple faults simulator with electrical timing information is presented. By using event-driven, selective trace and mixed incremental-in-space, signal and time simulation techniques, the simulation results show that it is superior in speedup, extra memory used and precision to other approaches. Moreover, this simulator is suited for parallel simulation in a multiprocessor system.

原文English
主出版物標題1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers, VTSA 1991
發行者Institute of Electrical and Electronics Engineers Inc.
頁面424-427
頁數4
ISBN(電子)078030036X, 9780780300361
DOIs
出版狀態Published - 1 一月 1991
事件1991 International Symposium on VLSI Technology, Systems, and Applications, VTSA 1991 - Taipei, Taiwan
持續時間: 22 五月 199124 五月 1991

出版系列

名字International Symposium on VLSI Technology, Systems, and Applications, Proceedings
ISSN(列印)1930-8868

Conference

Conference1991 International Symposium on VLSI Technology, Systems, and Applications, VTSA 1991
國家Taiwan
城市Taipei
期間22/05/9124/05/91

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