An ALU cluster with floating point unit for media streaming architecture with homogeneous processor cores

Chia Yi Liou*, Her-Ming Chiueh

*Corresponding author for this work

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

Recent research shows the stream processing model is suitable for portable media applications. However, previous implementations of stream processors are suffered from their power consumption and cost for chip area. Thus, these designs focus on super computer architecture and scientific computation instead of real-time media applications. This paper proposes an arithmetic logic unit (ALU) cluster with Advanced Microcontroller Bus Architecture (AMBA) platform interface, which is utilized as a reconfigurable hardware accelerator for portable media applications. The proposed design is implemented and fabricated using TSMC 0.15um technology with backend Magnetic RAM (MRAM) process integration. Floating point unit (FPU) improves 3.2 times higher averagely of performance and only increases 10.8% area overhead. The measurement result also reveals double power efficiency over previous designs using traditional architectures. Outstanding area-performance trade-off efficiency in FPU and homogeneous cores, power efficiency and design methodologies of this work contribute a turnkey solution for modern portable multimedia devices.

原文English
主出版物標題13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008
DOIs
出版狀態Published - 17 十一月 2008
事件13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008 - Hsinchu, Taiwan
持續時間: 4 八月 20086 八月 2008

出版系列

名字13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008

Conference

Conference13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008
國家Taiwan
城市Hsinchu
期間4/08/086/08/08

指紋 深入研究「An ALU cluster with floating point unit for media streaming architecture with homogeneous processor cores」主題。共同形成了獨特的指紋。

引用此