Advantage of small geometry silicon MOSFETs for high-frequency analog applications under low power supply voltage of 0.5V

M. Saito*, M. Ono, R. Fujimoto, C. Takahashi, H. Tanimoto, N. Ito, T. Ohguro, T. Yoshitomi, H. S. Momose, H. Iwai

*Corresponding author for this work

研究成果: Conference article同行評審

10 引文 斯高帕斯(Scopus)

摘要

Low noise high-frequency analog operation of small geometry silicon MOSFETs are demonstrated. By scaling gate length down to 0.3 - sub 0.1 μm regions, excellent low noise figure of 1.5 dB at 2 GHz was obtained with low drain current of 0.3 mA/μm at fT value of 20 - 65 GHz - the same level of today's high performance silicon bipolar transistors in research level. Even at low voltage operation such as 0.5 V, extremely high cutoff frequency of 48 GHz was realized by sub 0.1 μm gate length nMOSFETs. Such low voltage operations allow one order of magnitude smaller power consumption compare with 2V power supply voltage.

原文English
頁(從 - 到)71-72
頁數2
期刊Digest of Technical Papers - Symposium on VLSI Technology
DOIs
出版狀態Published - 1995
事件Proceedings of the 1995 Symposium on VLSI Technology - Kyoto, Jpn
持續時間: 6 六月 19958 六月 1995

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