A versatile multi-gate MOSFET compact model: BSIM-MG

Chen-Ming Hu*, C. H. Lin, M. Dunga, D. Lu, A. Niknejad

*Corresponding author for this work

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

BSIM-MG is a surface-potential based compact model for multi-gate MOSFETs such as FinFETs fabricated on either SOI or bulk substrates. It can model transistors with the gate controlling two, three, or four sides of the fin. The effects of body doping are modeled. It can also model a double-gate transistor with independently biased top and bottom gates and asymmetric top and bottom gate work-functions and dielectric thicknesses. It supports high performance metal-gate technologies as well low-cost polysilicon-gate memory technologies.

原文English
主出版物標題2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007, Technical Proceedings
頁面512-514
頁數3
出版狀態Published - 24 八月 2007
事件2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007 - Santa Clara, CA, United States
持續時間: 20 五月 200724 五月 2007

出版系列

名字2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007, Technical Proceedings
3

Conference

Conference2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007
國家United States
城市Santa Clara, CA
期間20/05/0724/05/07

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