We present our approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies. Using BSIMPD as a foundation, we unify the PD and FD models by the concept of body-source built-in potential lowering. This unification is crucial due to the coexistence of PD/FD devices in a single chip as well as the coexistence of PD/FD behavior in a single device. The unified BSIMSOI model has been implemented in Berkeley SPICE3f4 and many commercial circuit simulators.
|頁（從 - 到）||241-244|
|期刊||Proceedings of the Custom Integrated Circuits Conference|
|出版狀態||Published - 19 十一月 2003|
|事件||Proceedings of the IEEE 2003 Custom Integrated Circuits Conference - San Jose, CA, United States|
持續時間: 21 九月 2003 → 24 九月 2003