A simple and low-/cost method to fabricate TFTs with poly-Si nanowire channel

Horng-Chih Lin*, M. H. Lee, C. J. Su, T. Y. Huang, C. C. Lee, Yuh-Shyong Yang

*Corresponding author for this work

研究成果: Article同行評審

61 引文 斯高帕斯(Scopus)

摘要

A very simple and low-cost scheme is proposed for fabricating min-film transistors with poly-Si nanowire (NW) channels. In this scheme, the poly-Si NW channel is formed by cleverly employing the poly-Si sidewall spacer technique. In addition, the poly-Si NW channel is genuinely exposed to the environment after the poly-Si sidewall spacer formation in the new scheme. This unique feature, together with its simplicity and low-cost, makes this approach very suitable for applications and manufacturing of bio-logic sensing devices. Good device performance is demonstrated in this letter.

原文English
頁(從 - 到)643-645
頁數3
期刊IEEE Electron Device Letters
26
發行號9
DOIs
出版狀態Published - 1 九月 2005

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