A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation

Yuhua Cheng*, Min Chie Jeng, Zhihong Liu, Jianhui Huang, Mansun Chan, Kai Chen, Ping Keung Ko, Chen-Ming Hu

*Corresponding author for this work

研究成果: Article同行評審

141 引文 斯高帕斯(Scopus)

摘要

A new physical and continuous BSIM (Berkeley Short-Channel IGFET Model) I-V model in BSIM3v3 is presented for circuit simulation. Including the major physical effects in state-of-the art MOS devices, the model describes current characteristics from subthreshold to strong inversion as well as from the linear to the saturation operating regions with a single I-V expression, and guarantees the continuities of I ds, conductances and their derivatives throughout all V gs, V ds, and V bs bias conditions. Compared with the previous BSIM models, the improved model continuity enhances the convergence property of the circuit simulators. Furthermore, the model accuracy has also been enhanced by including the dependencies of geometry and bias of parasitic series resistances, narrow width, bulk charge, and DIBL effects. The new model has the extensive built-in dependencies of important dimensional and processing parameters (e.g., channel length, width, gate oxide thickness, junction depth, substrate doping concentration, etc.). It allows users to accurately describe the MOSFET characteristics over a wide range of channel lengths and widths for various technologies, and is attractive for statistical modeling. The model has been implemented in the circuit simulators such as Spectre, Hspice, SmartSpice, Spice3e2, and so on.

原文English
頁(從 - 到)277-287
頁數11
期刊IEEE Transactions on Electron Devices
44
發行號2
DOIs
出版狀態Published - 1 十二月 1997

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