A novel integrated amorphous silicon TFT gate driver circuit with optimized design for TFT-LCD display panel manufacturing

I. Hsiu Lo, Hui Wen Cheng, Yiming Li*, Po Jui Lin, Cheng Han Shen

*Corresponding author for this work

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this work, we design and optimize a new amorphous silicon gate (ASG) driver circuit for GOP (gate-on-panel) application in medium size LCD. The circuit is composed of sixteen TFTs and one capacitor with distinct pre-charge nodes and dual low voltage levels. The design of distinct pre-charge nodes is conducive to the decrease of the charge time, and the dual low voltage level will stabilize the output waveform in off-duty periods. Biology-inspired global optimization technique is thus advanced to optimize circuit parameter for further improvement of dynamic characteristics. The optimization not only considers output characteristics but the pre-charge node voltage fluctuation, which may lead serious variation to output waveform when the temperature becomes higher. The results of our design including optimization indicate the achieved circuit performance is apparently better than an original design, where the associated sensitivity analysis is examined to assess the variation of optimized specification. The proposed new design is useful for manufacturing.

原文English
主出版物標題Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011
頁面262-265
頁數4
DOIs
出版狀態Published - 2011
事件3rd Asia Symposium on Quality Electronic Design, ASQED 2011 - Kuala Lumpur, Malaysia
持續時間: 19 七月 201120 七月 2011

出版系列

名字Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011

Conference

Conference3rd Asia Symposium on Quality Electronic Design, ASQED 2011
國家Malaysia
城市Kuala Lumpur
期間19/07/1120/07/11

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