This paper proposes a new architecture of 12-bit current-steering digital-to-analog converter (DAC) with novel biasing scheme. In the proposed DAC, two 6-bit binary-weighted current source arrays are designed with two reference currents. The technique allows significant area savings without impairing static accuracy. The paper also presents a method to generate dual reference currents, whose design is compact and consumes low static power. The active area of the 12-bit DAC is 0.36mm2 approximately. This chip was fabricated by a standard 0.18μm CMOS technology, and consumes 38mW at 180MS/s update rate with 1.8V supply voltage.