A novel 12-bit current-steering DAC with two reference currents

Fang Ting Chou, Zong Yi Chen, Hsing Chien Chu, Chung-Chih Hung

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

This paper proposes a new architecture of 12-bit current-steering digital-to-analog converter (DAC) with novel biasing scheme. In the proposed DAC, two 6-bit binary-weighted current source arrays are designed with two reference currents. The technique allows significant area savings without impairing static accuracy. The paper also presents a method to generate dual reference currents, whose design is compact and consumes low static power. The active area of the 12-bit DAC is 0.36mm2 approximately. This chip was fabricated by a standard 0.18μm CMOS technology, and consumes 38mW at 180MS/s update rate with 1.8V supply voltage.

原文English
主出版物標題2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1022-1025
頁數4
ISBN(電子)9781479983919
DOIs
出版狀態Published - 27 七月 2015
事件IEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal
持續時間: 24 五月 201527 五月 2015

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2015-July
ISSN(列印)0271-4310

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2015
國家Portugal
城市Lisbon
期間24/05/1527/05/15

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