A multiple code-rate turbo decoder based on reciprocal dual trellis architecture

Chen Yang Lin*, Cheng Chi Wong, Hsie-Chia Chang

*Corresponding author for this work

研究成果: Conference contribution同行評審

4 引文 斯高帕斯(Scopus)

摘要

To increase channel efficiency for high through-put systems, the high code-rate schemes are usually required. However, conventional turbo decoders in high code-rate usually apply high radix trellis structure, and the complexity of the trellis increases exponentially according to the code-rate. In this paper, the reciprocal dual trellis is applied to reduce the trellis complexity and a multiple code-rate turbo decoder is proposed. A sign magnitude representation is also introduced to lower the hardware complexity. The puncturing methodology is applied to WCDMA system as a case study of high code-rate turbo codes, and the investigated code-rates are 1/3, 1/2, 2/3, and 4/5. The simulation results are also shown in this paper. Fabricated with CMOS 90nm process, the proposed decoder containing 370K logic gates and 58kb storage units can achieve 101Mb/s with 80mW at code-rate 4/5.

原文English
主出版物標題ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
主出版物子標題Nano-Bio Circuit Fabrics and Systems
頁面1496-1499
頁數4
DOIs
出版狀態Published - 31 八月 2010
事件2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
持續時間: 30 五月 20102 六月 2010

出版系列

名字ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Conference

Conference2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
國家France
城市Paris
期間30/05/102/06/10

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