A miniaturized CPW-Fed capacitor-loaded slot-loop antenna

Pei-Ling Chi*, Kevin M. Leong, Rod Waterhouse, Tatsuo Itoh

*Corresponding author for this work

研究成果: Conference contribution同行評審

16 引文 斯高帕斯(Scopus)

摘要

A simple and efficient approach for antenna miniaturization is proposed in this paper. A slow wave structure, which applies to the concept of increasing the propagation constant in the resonant path and so results in the decreased resonant frequencies, is used for implementation. In this paper, we present a CPW-fed slot-loop antenna periodically loaded with capacitors to effectively increase the propagation constant for the purpose of antenna miniaturization. The equivalent transmission line circuit model for the established antenna was utilized as an approach for analysis and it predicted the slow-wave behavior well when compared to the full-wave simulation. Both simulation and measurement demonstrate a physical size reduction of about six times with respect to an unloaded slot-loop antenna.

原文English
主出版物標題2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007
頁面595-598
頁數4
DOIs
出版狀態Published - 1 十二月 2007
事件2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007 - Montreal, QC, Canada
持續時間: 30 七月 20072 八月 2007

出版系列

名字Conference Proceedings of the International Symposium on Signals, Systems and Electronics

Conference

Conference2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007
國家Canada
城市Montreal, QC
期間30/07/072/08/07

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