A miniature low-insertion-loss, high-power CMOS SPDT switch using floating-body technique for 2.4- And 5.8-GHz applications

Mei Chao Yeh*, Ren Chieh Liu, Zuo-Min Tsai , Huei Wang

*Corresponding author for this work

研究成果: Conference contribution同行評審

13 引文 斯高帕斯(Scopus)

摘要

A low insertion loss SPOT switch in standard 0.18-μm CMOS process was developed for 2.4- and 5.8-GHz WLAN applications. In order to reduce the insertion loss and increase the P1dB, the floating-body circuit topology is proposed. The series-shunt switch achieves a measured P 1dB of 20 dBm, an insertion loss of 1.1 dB, and an isolation of 27 dB at 5.8 GHz. It also achieves a measured insertion loss of 0.65 dB and an isolation of 35 dB at 2.4 GHz. The effective chip size is only 0.03 mm 2. The measured data agree with the simulation results well. To our knowledge, this work presents the low insertion loss, high isolation and good power performance with the smallest chip size among the previouslv reported 2.4- and 5.8-GHz CMOS switches.

原文English
主出版物標題2005 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Digest of Papers
編輯A. Jerng
頁面451-454
頁數4
DOIs
出版狀態Published - 15 十一月 2005
事件2005 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Digest of Papers - Long Beach, CA, United States
持續時間: 12 六月 200514 六月 2005

出版系列

名字Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN(列印)1529-2517

Conference

Conference2005 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Digest of Papers
國家United States
城市Long Beach, CA
期間12/06/0514/06/05

指紋 深入研究「A miniature low-insertion-loss, high-power CMOS SPDT switch using floating-body technique for 2.4- And 5.8-GHz applications」主題。共同形成了獨特的指紋。

引用此