@inproceedings{8ae7829f0699458db36be9d736eec2b3,
title = "A High Current efficiency Stacked Digital Low Dropout Array with True-Random-Noise Injection and Ultralow Output Ripple for Power-Side Channel Attack Protection",
abstract = "This paper proposes a stacked digital low dropout (DLDO) array with three stacked groups to improve security and efficiency, consuming 1/3 of the input current in the prior art. The security is improved by two mechanisms. The advanced encryption standard (AES) engine can be one of point of loads (POLs) hidden in the deeper levels to minimize the disturbance from the AES to the input current. The other is the digital balanced interleave control (DBIC) receives random sources from internal leakage current frequency generator (LCFG) to generate randomly noise current to further hide the current interference caused by the AES. Due to DBIC and LCFG techniques, the correlation between input current and AES current is low to 0.006, which is 150 times lower than that of conventional DLDO.",
author = "Lee, {Cheng Yen} and Huang, {Tzu Ping} and Chen, {Ke Horng} and Lin, {Ying Hsi} and Lin, {Shian Ru} and Tsai, {Tsung Yen}",
year = "2019",
month = jun,
doi = "10.23919/VLSIC.2019.8778069",
language = "English",
series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "C322--C323",
booktitle = "2019 Symposium on VLSI Circuits, VLSI Circuits 2019 - Digest of Technical Papers",
address = "United States",
note = "null ; Conference date: 09-06-2019 Through 14-06-2019",
}