A current-mode 60-GHz direct-conversion receiver, which can break performance tradeoffs among bandwidth, noise figure (NF), and linearity is designed and realized in 65-nm CMOS. The 60-GHz receiver employs the novel frequency-staggered series resonance common source (FSRCS) stage to extend RF bandwidth with superior noise performance. The receiver's current-mode operation offers excellent out-of-band blocker tolerance and linearity. With on-chip quadrature local oscillator generations, the fabricated receiver simultaneously achieves minimal NF of 3.8 dB, RF bandwidth of 7.5 GHz, output P1\dB of 1 dBm, and maximum conversion gain of 36 dB. The receiver is capable of tolerating out-of-channel blocker up to-9 dBm at 3.5 GHz away. It occupies a silicon area of 1.3 mm2 and draws 25.5 mA of current from a 1-V supply.
|頁（從 - 到）||1053-1062|
|期刊||IEEE Transactions on Microwave Theory and Techniques|
|出版狀態||Published - 1 三月 2015|