Being operated with 0.3V supply voltage in a standard 65nm CMOS process, a new CMOS temperature compensated voltage reference circuit is proposed with subthreshold transistors and native nMOS. The reference drain current provided by the gate voltage of a subthreshold nMOS output transistor is nearly independent of temperature due to the existence of mutual compensation of mobility and threshold voltage variation. The new proposed temperature compensated voltage reference circuit functions well with the output voltage Vref of 168 mV at room temperature as no extra laser trimming is needed after fabrication. The total power consumption is about 70nW. With the VDD power supply of 0.3V, the temperature coefficient (TC) of voltage reference circuit is 105 ppm/°C as temperature varies from -20°C to 100°C. The chip size of the fabricated bandgap reference circuit is 0.0053mm2.