A 65nm CMOS 140 GHz 27.3 dBm EIRP transmit array with membrane antenna for highly scalable multi-chip phase arrays

Adrian Tang, Nacer Chahat, Yan Zhao, Gabriel Virbila, Choonsup Lee, Frank Hsiao, Li Du, Yen-Cheng Kuan, Mau-Chung Chang, Goutam Chattopadhyay, Imran Mehdi

研究成果: Conference contribution同行評審

11 引文 斯高帕斯(Scopus)

摘要

This paper presents a scalable transmit phase array operating at 140 GHz which employs a local PLL reference generation system. Unlike traditional CMOS phase arrays, this enables the array to be formed over multiple chips while avoiding the challenges of distributing mm-wave signals between them. The prototype chip consumes 131 mW of power and occupies 1.95 mm2 of chip area when implemented in 65 nm CMOS technology.

原文English
主出版物標題2014 IEEE MTT-S International Microwave Symposium, IMS 2014
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(列印)9781479938698
DOIs
出版狀態Published - 1 一月 2014
事件2014 IEEE MTT-S International Microwave Symposium, IMS 2014 - Tampa, FL, United States
持續時間: 1 六月 20146 六月 2014

出版系列

名字IEEE MTT-S International Microwave Symposium Digest
ISSN(列印)0149-645X

Conference

Conference2014 IEEE MTT-S International Microwave Symposium, IMS 2014
國家United States
城市Tampa, FL
期間1/06/146/06/14

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