A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology

Nayu Li; Min Li; Shaogang Wang; Zijiang Zhang; Huiyan Gao; Yen Cheng Kuan; Xiaopeng Yu; Zhiwei Xu

doi:10.1109/RFIC49505.2020.9218299

A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology

Nayu Li, Min Li, Shaogang Wang, Zijiang Zhang, Huiyan Gao, Yen Cheng Kuan, Xiaopeng Yu, Zhiwei Xu

研究成果: Conference contribution › 同行評審

1 引文斯高帕斯（Scopus）

摘要

This paper presents a 4-element 7.5-9 GHz phased array receiver with 1-8 concurrent beams in a 65-nm CMOS technology. All the elements are fully-connected to each output beam using 32 phase shifters and 8 active combiners. The current-starving gm-based phase shifter with 6-bit phase resolution achieves <2° RMS phase error and <0.3 dB RMS gain error. The receiver demonstrates 20 dB gain, 3.6 dB noise figure (NF) and-19 dBm input 1-dB gain compression point (IP1dB) in 7.5-9 GHz band for each element. The chip occupies 5.42 × 3.62 mm2 area excluding pads and consumes 860 mW, equivalent to 27 mW per element per beam. To our knowledge, the receiver achieves the maximum number of simultaneously reconfigurable beams with the lowest power consumption per element per beam in RF phase shifting and combining receiver chips.

原文	English
主出版物標題	RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	83-86
頁數	4
ISBN（電子）	9781728168098
DOIs	https://doi.org/10.1109/RFIC49505.2020.9218299
出版狀態	Published - 八月 2020
事件	2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 - Virtual, Los Angeles, United States 持續時間: 4 八月 2020 → 6 八月 2020

出版系列

名字	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
卷	2020-August
ISSN（列印）	1529-2517

Conference

Conference	2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020
國家	United States
城市	Virtual, Los Angeles
期間	4/08/20 → 6/08/20

存取文件

10.1109/RFIC49505.2020.9218299

Link to publication in Scopus

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引用此

Li, N., Li, M., Wang, S., Zhang, Z., Gao, H., Kuan, Y. C., Yu, X., & Xu, Z. (2020). A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology. 於 RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium (頁 83-86). [9218299] (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium; 卷 2020-August). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIC49505.2020.9218299

Li, Nayu ; Li, Min ; Wang, Shaogang ; Zhang, Zijiang ; Gao, Huiyan ; Kuan, Yen Cheng ; Yu, Xiaopeng ; Xu, Zhiwei. / A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology. RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium. Institute of Electrical and Electronics Engineers Inc., 2020. 頁 83-86 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium).

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title = "A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology",

abstract = "This paper presents a 4-element 7.5-9 GHz phased array receiver with 1-8 concurrent beams in a 65-nm CMOS technology. All the elements are fully-connected to each output beam using 32 phase shifters and 8 active combiners. The current-starving gm-based phase shifter with 6-bit phase resolution achieves <2° RMS phase error and <0.3 dB RMS gain error. The receiver demonstrates 20 dB gain, 3.6 dB noise figure (NF) and-19 dBm input 1-dB gain compression point (IP1dB) in 7.5-9 GHz band for each element. The chip occupies 5.42 × 3.62 mm2 area excluding pads and consumes 860 mW, equivalent to 27 mW per element per beam. To our knowledge, the receiver achieves the maximum number of simultaneously reconfigurable beams with the lowest power consumption per element per beam in RF phase shifting and combining receiver chips.",

keywords = "fully-connected multi-beam phased array, low-noise amplifier, phase shifter, phased array receiver",

author = "Nayu Li and Min Li and Shaogang Wang and Zijiang Zhang and Huiyan Gao and Kuan, {Yen Cheng} and Xiaopeng Yu and Zhiwei Xu",

year = "2020",

month = aug,

doi = "10.1109/RFIC49505.2020.9218299",

language = "English",

series = "Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium",

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Li, N, Li, M, Wang, S, Zhang, Z, Gao, H, Kuan, YC, Yu, X & Xu, Z 2020, A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology. 於 RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium., 9218299, Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, 卷 2020-August, Institute of Electrical and Electronics Engineers Inc., 頁 83-86, 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020, Virtual, Los Angeles, United States, 4/08/20. https://doi.org/10.1109/RFIC49505.2020.9218299

A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology. / Li, Nayu; Li, Min; Wang, Shaogang; Zhang, Zijiang; Gao, Huiyan; Kuan, Yen Cheng; Yu, Xiaopeng; Xu, Zhiwei.

RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium. Institute of Electrical and Electronics Engineers Inc., 2020. p. 83-86 9218299 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium; 卷 2020-August).

研究成果: Conference contribution › 同行評審

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AU - Li, Min

AU - Wang, Shaogang

AU - Zhang, Zijiang

AU - Gao, Huiyan

AU - Kuan, Yen Cheng

AU - Yu, Xiaopeng

AU - Xu, Zhiwei

PY - 2020/8

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N2 - This paper presents a 4-element 7.5-9 GHz phased array receiver with 1-8 concurrent beams in a 65-nm CMOS technology. All the elements are fully-connected to each output beam using 32 phase shifters and 8 active combiners. The current-starving gm-based phase shifter with 6-bit phase resolution achieves <2° RMS phase error and <0.3 dB RMS gain error. The receiver demonstrates 20 dB gain, 3.6 dB noise figure (NF) and-19 dBm input 1-dB gain compression point (IP1dB) in 7.5-9 GHz band for each element. The chip occupies 5.42 × 3.62 mm2 area excluding pads and consumes 860 mW, equivalent to 27 mW per element per beam. To our knowledge, the receiver achieves the maximum number of simultaneously reconfigurable beams with the lowest power consumption per element per beam in RF phase shifting and combining receiver chips.

AB - This paper presents a 4-element 7.5-9 GHz phased array receiver with 1-8 concurrent beams in a 65-nm CMOS technology. All the elements are fully-connected to each output beam using 32 phase shifters and 8 active combiners. The current-starving gm-based phase shifter with 6-bit phase resolution achieves <2° RMS phase error and <0.3 dB RMS gain error. The receiver demonstrates 20 dB gain, 3.6 dB noise figure (NF) and-19 dBm input 1-dB gain compression point (IP1dB) in 7.5-9 GHz band for each element. The chip occupies 5.42 × 3.62 mm2 area excluding pads and consumes 860 mW, equivalent to 27 mW per element per beam. To our knowledge, the receiver achieves the maximum number of simultaneously reconfigurable beams with the lowest power consumption per element per beam in RF phase shifting and combining receiver chips.

KW - fully-connected multi-beam phased array

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T3 - Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

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BT - RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium

PB - Institute of Electrical and Electronics Engineers Inc.

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Li N, Li M, Wang S, Zhang Z, Gao H, Kuan YC 等. A 4-Element 7.5-9 GHz Phased Array Receiver with 8 Simultaneously Reconfigurable Beams in 65 nm CMOS Technology. 於 RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium. Institute of Electrical and Electronics Engineers Inc. 2020. p. 83-86. 9218299. (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium). https://doi.org/10.1109/RFIC49505.2020.9218299