A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface

Jieqiong Du, Jia Zhou, Chia Jen Liang, Boyu Hu, Yuan Du, Mau Chung Frank Chang

研究成果: Conference contribution同行評審

摘要

A 32-Gb/s low-power single-ended 16-QAM transceiver using four signal levels is presented for high-speed memory interface. With four-bit per symbol, the transceiver increases the symbol period by 4× to enhance energy-efficiency by reducing the bandwidth requirement for most circuit blocks and mitigating equalization requirements. The transmitter achieves 16-QAM modulation by combining two QPSK modulators for linearity relaxation. Taking advantage of the DC-balanced 16-QAM signal, the receiver adopts a low-noise single-to-differential amplifier with a low-power DC feedback to recover the signal without requiring an external reference. The proposed transceiver achieves 0.875 pJ/bit at full rate while occupying 0.018 mm2 in 28-nm CMOS technology.

原文English
主出版物標題2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728199429
DOIs
出版狀態Published - 六月 2020
事件2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States
持續時間: 16 六月 202019 六月 2020

出版系列

名字IEEE Symposium on VLSI Circuits, Digest of Technical Papers
2020-June

Conference

Conference2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
國家United States
城市Honolulu
期間16/06/2019/06/20

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