A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm

Hsie-Chia Chang*, Chih Yu Cheng, Shu Hui Tsai, Chen-Yi Lee

*Corresponding author for this work

研究成果: Paper同行評審

2 引文 斯高帕斯(Scopus)

摘要

A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.

原文English
頁面262-265
頁數4
DOIs
出版狀態Published - 1 十二月 2000
事件43rd Midwest Circuits and Systems Conference (MWSCAS-2000) - Lansing, MI, United States
持續時間: 8 八月 200011 八月 2000

Conference

Conference43rd Midwest Circuits and Systems Conference (MWSCAS-2000)
國家United States
城市Lansing, MI
期間8/08/0011/08/00

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