A 1 GHz OTA-based low-pass filter with a high-speed automatic tuning scheme

Tien Yu Lo*, Chung-Chih Hung

*Corresponding author for this work

研究成果: Conference contribution同行評審

17 引文 斯高帕斯(Scopus)

摘要

A continuous-time 4th-order equiripple linear phase G m-C filter with an automatic tuning circuit is presented. A high speed OTA based on the inverter structure is realized. The combined CMFF and CMFB circuit ensures the input and output common-mode stability. The gain performance could be maintained by combining a negative resistor at the output nodes. Transconductance tuning can be achieved by adjusting the bulk voltage by using the Deep-NWELL technology. Through the use of the OTA as a building block with a modified automatic tuning scheme, the filter -3dB cutoff frequency is 1GHz with the group delay less than 4% variation up to 1.5fc frequency. The -43dB of IM3 at filter cutoff frequency is obtained with -4dbm two tone signals. Implemented in 0.18-μm CMOS process, the chip occupies 1mm2 and consumes 175mW at a 1.5-V supply voltage.

原文English
主出版物標題2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
頁面408-411
頁數4
DOIs
出版狀態Published - 1 十二月 2007
事件2007 IEEE Asian Solid-State Circuits Conference, A-SSCC - Jeju, Korea, Republic of
持續時間: 12 十一月 200714 十一月 2007

出版系列

名字2007 IEEE Asian Solid-State Circuits Conference, A-SSCC

Conference

Conference2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
國家Korea, Republic of
城市Jeju
期間12/11/0714/11/07

指紋 深入研究「A 1 GHz OTA-based low-pass filter with a high-speed automatic tuning scheme」主題。共同形成了獨特的指紋。

引用此