A low-power low-flicker-noise receiver is demonstrated using 0.18 μm CMOS technology. Vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are used to substitute the mixer switching core and the input stage of subsequent IF VGA. Compared with the conventional CMOS mixer, the excellent flicker noise performance is obtained. As a result, the receiver achieves a 47 dB voltage gain at 2.4-GHz, and the noise figure is 9.6 dB at IF=100 kHz and 5.6 dB for IF>300 kHz. The total current consumption is 4.3 mA at 1.8 V supply voltage.
|主出版物標題||RSW 2013 - 2013 IEEE Radio and Wireless Symposium - RWW 2013|
|出版狀態||Published - 1 五月 2013|
|事件||2013 IEEE Radio and Wireless Symposium, RSW 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013 - Austin, TX, United States|
持續時間: 20 一月 2013 → 23 一月 2013
|名字||IEEE Radio and Wireless Symposium, RWS|
|Conference||2013 IEEE Radio and Wireless Symposium, RSW 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013|
|期間||20/01/13 → 23/01/13|