XPS study on the effects of thermal annealing on CeO2/La2O3 stacked gate dielectrics

Jieqiong Zhang*, Hei Wong, Kuniyuki Kakushima, Hiroshi Iwai

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

18 Scopus citations


Effects of thermal annealing on the interface reactions and the bonding structures of several CeO2/La2O3 stacked dielectrics were studied in detail based on x-ray photoelectron spectroscopy (XPS) measurements. Results indicated that the high-temperature annealing can enhance O, Ce, La, and Si diffusion and result in the intermixing of CeO2/La2O3 stack, growth of interfacial silicates layer at the La2O3/Si interface. A small amount of Ce3+ re-oxidation and significant interface oxidation were found for thermal annealing at 600 °C. Based on these observations, reactions taken place at both the CeO2/La2O3 and La2O3/Si interfaces during thermal annealing are proposed. The growth of low-k interfacial layer undoubtedly brings a great challenge for achieving the smallest equivalent oxide thickness (EOT) with superior interface properties. This investigation provides some additional information for possible performance optimization of the high-k gate dielectrics in the subnanometer EOT era.

Original languageEnglish
Pages (from-to)30-35
Number of pages6
JournalThin Solid Films
StatePublished - 1 Feb 2016


  • High-k dielectrics
  • Interface reaction
  • Thermal annealing
  • X-ray photoelectron spectroscopy (XPS)

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