Wideband time-delay circuit

Yao Wei Chang*, Tzu Chao Yan, Chien-Nan Kuo

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

12 Scopus citations

Abstract

Limitations of the delay bandwidth in active delay circuits can be significantly improved in high-order transfer functions. In this paper, a flat wideband delay circuit is presented using the 2nd-order form of the Padé approximant. The delay circuit is designed and implemented in 0.18 μm CMOS technology. The measured results show that the circuit achieves a delay time of 49 psec in the GHz frequency range. The power consumption of the core circuit is 7.88 mW from 1.8 V supply voltage. The entire die occupies an area of 520×820 μm 2.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2011
Subtitle of host publication"Wave to the Future", EuMW 2011, Conference Proceedings - 6th European Microwave Integrated Circuit Conference, EuMIC 2011
Pages454-457
Number of pages4
StatePublished - 1 Dec 2011
Event14th European Microwave Week 2011: "Wave to the Future", EuMW 2011 - 6th European Microwave Integrated Circuit Conference, EuMIC 2011 - Manchester, United Kingdom
Duration: 10 Oct 201111 Oct 2011

Publication series

NameEuropean Microwave Week 2011: "Wave to the Future", EuMW 2011, Conference Proceedings - 6th European Microwave Integrated Circuit Conference, EuMIC 2011

Conference

Conference14th European Microwave Week 2011: "Wave to the Future", EuMW 2011 - 6th European Microwave Integrated Circuit Conference, EuMIC 2011
CountryUnited Kingdom
CityManchester
Period10/10/1111/10/11

Keywords

  • all-pass filter (APF)
  • delay bandwidth product (DBW)
  • Delay line
  • group delay
  • Padé approximant

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