Wideband leveling amplifier design using 0.18 μm CMOS process

Guan Shian Li, Chin Ying Huang, Shu-I Hu, Chung Ping Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This manuscript reports the development of leveling amplifier, or known as active gain equalizer designed using commercial 0.18 μm CMOS process. Similar to a distributed amplifier, this circuit uses artificial transmission lines to achieve broadband input and output matching; each of the gain cells utilizes two cascode amplification stages to sustain wideband gain performance. Allowing attenuation of the input transmission line to be frequency-dependent, where the shunt admittance G comes from a resistor in series with a capacitor, this equalizer's gain slope can be adjusted. On the other hand, the output transmission line will be altered by the capacitors attached to the gate nodes of the output common-gate transistors, and that in turn shifts the equalizer's cutoff frequency In the simulation, the high-frequency gain can be lifted from 15 dB up to 30 dB in small steps, while the cutoff frequency can be finessed within 1 GHz. Small input and output reflection coefficients are also observed, and the port isolation is better than 40 dB across the bandwidth.

Original languageEnglish
Title of host publicationPIERS 2013 Taipei - Progress in Electromagnetics Research Symposium, Proceedings
Pages1088-1090
Number of pages3
StatePublished - 27 May 2013
EventProgress in Electromagnetics Research Symposium, PIERS 2013 Taipei - Taipei, Taiwan
Duration: 25 Mar 201328 Mar 2013

Publication series

NameProgress in Electromagnetics Research Symposium
ISSN (Print)1559-9450

Conference

ConferenceProgress in Electromagnetics Research Symposium, PIERS 2013 Taipei
CountryTaiwan
CityTaipei
Period25/03/1328/03/13

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