Wide Vfband Vth tunability for metal-gated MOS devices with HfLaO gate dielectrics

X. P. Wang, H. Y. Yu, M. F. Li, C. X. Zhu, S. Biesemans, Albert Chin, Y. Y. Sun, Y. P. Feng, Andy Lim, Yee Chia Yeo, Wei Yip Loh, G. Q. Lo, Dim Lee Kwong

Research output: Contribution to journalArticle

57 Scopus citations

Abstract

For the first time, we demonstrate experimentally that by using HfLaO high-k gate dielectric, the flat-band voltage (Vfb) and the threshold voltage (Vth) of metal-electrode-gated MOS devices can be tuned effectively in a wide range (wider than that from the Si-conduction band edge to the Si-valence band edge) after a 1000-°C annealing required by a conventional CMOS source/drain activation process. As prototype examples shown in this letter, TaN gate with effective work function Φm,eff ∼ 3.9-4.2 eV and Pt gate with Φm,eff ∼ 5.5 eV are reported. A specific model based on the interfacial dipole between the metal gate and the HfLaO is proposed to interpret the results. This provides an additionally practical guideline for choosing the appropriate gate stacks and dielectric to meet the requirements of future CMOS devices.

Original languageEnglish
Pages (from-to)258-260
Number of pages3
JournalIEEE Electron Device Letters
Volume28
Issue number4
DOIs
StatePublished - 1 Apr 2007

Keywords

  • CMOS
  • Fermi-level pinning
  • HfLaO
  • High-k (HK) dielectric
  • Interfacial dipole
  • Metal gate (MG)
  • Work function

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