Whole-chip ESD protection scheme for CMOS mixed-mode IC's in deep-submicron CMOS technology

Ming-Dou Ker*, Chung-Yu Wu, Hun Hsien Chang, Tain Shun Wu

*Corresponding author for this work

Research output: Contribution to journalConference article

13 Scopus citations

Abstract

A whole-chip ESD protection scheme with the ESD-connection diodes and a substrate-triggering field-oxide device (STFOD) are proposed to protect mixed-mode CMOS IC's against ESD damage. The STFOD is triggered on by the substrate-triggering technique to make an area-efficient VDD-to-VSS ESD clamp circuit. The ESD-connection diodes provide the current discharging paths among the multiple separated power lines to avoid the ESD damage located at the digital-analog interface. This whole-chip ESD protection scheme has been practically verified in an 8-bits DAC chip in a 0.6-μm CMOS process with a pin-to-pin ESD robustness of above 4 KV.

Original languageEnglish
Pages (from-to)31-34
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
DOIs
StatePublished - 1 Jan 1997
EventProceedings of the 1997 IEEE Custom Integrated Circuits Conference - Santa Clara, CA, USA
Duration: 5 May 19978 May 1997

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