VLSI processor design of real-time data compression for high-resolution imaging radar

Wai-Chi  Fang*

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

2 Scopus citations

Abstract

For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.

Original languageEnglish
Pages (from-to)441-444
Number of pages4
JournalProceedings of the Annual IEEE International ASIC Conference and Exhibit
DOIs
StatePublished - 1 Dec 1994
EventProceedings of the 7th IEEE International ASIC Conference and Exhibit - Rochester, NY, USA
Duration: 19 Sep 199423 Sep 1994

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