VLSI design of turbo decoder for integrated communication system-on-chip applications

Wai-Chi  Fang*, Ashwin Sethuram, Kemal Belevi

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

A high-throughput low-power turbo decoder core has been developed for integrated communication system applications such as Digital Video Broadcast (DVB), satellite communications, wireless LAN, digital TV, cable modem, and xDSL systems. The turbo decoder is based on convolutional constituent codes, which outperform all other Forward Error Correction techniques. This turbo decoder core is parameterizable and can be modified easily to fit any size for advanced communication system-on-chip products. The turbo decoder core provides Forward Error Correction of up to 15 Mbits/sec on a 0.13-micron CMOS FPGA prototyping chip at a power of 0.1 watt.

Original languageEnglish
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume2
DOIs
StatePublished - 14 Jul 2003
EventProceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
Duration: 25 May 200328 May 2003

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