Vertical n-channel poly-Si thin-film transistors with symmetric S/D fabricated by Ni-silicide-induced lateral-crystallization technology

Po Yi Kuo*, Tien-Sheng Chao, Jiou Teng Lai, Tan Fu Lei

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

We have successfully developed and fabricated the vertical n-channel polycrystalline silicon thin-film transistors with symmetric S/D fabricated by Ni-silicide-induced lateral-crystallization technology (NSILC-VTFTs). The NSILC-VTFTs are S/D symmetric devices and equivalent to dual-gate devices. The dual-gate structure of NSILC-VTFTs can moderate the lateral electrical field in the drain depletion region, significantly reducing the leakage current. In NSILC-VTFTs, the Ni accumulation and grain boundaries induced from S/D sides can be centralized in the n+ floating region. The effects of Ni accumulation in symmetric VTFTs crystallized by NSILC and metal-induced lateral crystallization are studied. In addition, a two-step lateral crystallization has been introduced to improve the crystal integrity through secondary crystallization. The NSILC-VTFTs crystallized by two-step lateral crystallization show a steep subthreshold swing of 180 mV/dec and field effect mobility μ = 553 cm2 /V · s without NH3 plasma treatment.

Original languageEnglish
Pages (from-to)237-239
Number of pages3
JournalIEEE Electron Device Letters
Volume30
Issue number3
DOIs
StatePublished - 12 Feb 2009

Keywords

  • Dual gate
  • n floating region
  • Ni-silicide-induced lateral crystallization (NSILC)
  • Polycrystalline silicon thin-film transistors (poly-Si TFTs)
  • Symmetric S/D
  • Vertical channel

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