Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips

Juinn-Dar Huang, Chia Hung Liu, Wei Hao Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Digital microfluidic biochip (DMFB) is a tiny device that can carry out a rich set of bioassays without the need of bulky equipment. However, designing a good general-purpose DMFB architecture is still considered a big challenge today. NP-hard synthesis problems make on-line synthesis virtually impossible on exiting array-based architectures. In this paper, we first elaborate on the major concerns in a DMFB design flow, from the aspects of both synthesis and physical design. We then propose a versatile ring-based architecture VERBA and its corresponding fast one-pass synthesis flow. Experimental results show that VERBA incorporated with the proposed synthesis flow is a better solution than existing architectures and synthesis algorithms especially for real-time cyber-physical systems.

Original languageEnglish
Title of host publicationProceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018
PublisherIEEE Computer Society
Pages13-18
Number of pages6
ISBN (Electronic)9781538647561
DOIs
StatePublished - 19 Feb 2019
Event26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018 - Verona, Italy
Duration: 8 Oct 201810 Oct 2018

Publication series

NameIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
Volume2018-October
ISSN (Print)2324-8432
ISSN (Electronic)2324-8440

Conference

Conference26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018
CountryItaly
CityVerona
Period8/10/1810/10/18

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  • Cite this

    Huang, J-D., Liu, C. H., & Yang, W. H. (2019). Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips. In Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018 (pp. 13-18). [8644984] (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC; Vol. 2018-October). IEEE Computer Society. https://doi.org/10.1109/VLSI-SoC.2018.8644984