Utilizing radio-frequency interconnect for a many-DIMM DRAM system

Kanit Therdsteerasukdi*, Gyung Su Byun, Jeremy Ir, Glenn Reinman, Jason Cong, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalArticle

7 Scopus citations


The demand for capacity and off-chip bandwidth to dynamic random-access memory (DRAM) will continue to grow as we integrate more cores onto a die. However, as the data rate of DRAM has increased, the number of dual in-line memory modules (DIMMs) supported on a multi-drop bus has decreased. Therefore, traditional memory systems are not sufficient to meet both these demands. We propose the DIMM tree architecture for better scalability by connecting the DIMMs as a tree. The DIMM tree architecture is able to grow the number of DIMMs exponentially with each level of latency in the tree. We also propose application of multiband radio-frequency interconnect (MRF-I) to the DIMM tree architecture for even greater scalability and higher throughput. The DIMM tree architecture without MRF-I was able to scale up to 64 DIMMs with only an 8% degradation in throughput over an ideal system. The DIMM tree architecture with MRF-I was able to increase throughput by 68% (up to 200%) on a 64-DIMM system over a 4-DIMM system. Finally, we propose the partitioned DIMM tree, which allows the scaling of a main memory system to a many-DIMM memory system while still maintaining high throughput. The partitioned DIMM tree is able to improve throughput by an average of 19% up to 35% over the DIMM tree with 256 DIMMs on a single channel.

Original languageEnglish
Article number6205338
Pages (from-to)210-227
Number of pages18
JournalIEEE Journal on Emerging and Selected Topics in Circuits and Systems
Issue number2
StatePublished - 31 May 2012


  • Integrated circuit interconnections
  • memory architecture
  • radio-frequency integrated circuits
  • random access memory

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