Using voltage-difference to design a dual-voltage low-power multiple-mode video decoder

Ching Hwa Cheng, Sheng Wei Hsu, Cheng An Chien, Jiun-In  Guo

Research output: Contribution to journalArticlepeer-review

2 Scopus citations


Voltage adjustment is the easiest way to reduce power consumption. Dual-Vdd technology is used to design a low-power multi-mode video decoder (MMVD), as demonstrated in this paper. Our design uses dual voltages to reduce power consumption without performance degradation. In this low-power MMVD design, the critical-delay function blocks operate at high supplied voltage and the non critical-delay blocks operate at low supplied voltage. The front-end design technique of the module's voltage domain assignment optimization with the back-end design technique of the die's area and volt-age-drop balance techniques are all exploited for designing the test chip. The MMVD test chip proves that it can efficiently reduce power consumption without causing circuit delay time and an increase in the die's area. Using the voltage-difference technique only, the MMVD test chip is successfully validated after system integration, and obtains about 25% reduction in power consumption, which is better than that of the same design using a single supply voltage. These experiments have contributed to show voltage-difference can effective reduce power consumption without any circuit performance degradation penalty. When the MMVD test chip incorporates low-Vdd, adjusted-frequency, and voltage-difference, a 60% power reduction can be obtained.

Original languageEnglish
Pages (from-to)223-233
Number of pages11
JournalInternational Journal of Electrical Engineering
Issue number6
StatePublished - 1 Dec 2012


  • Dual voltage design
  • Low power design
  • Video decoder

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