Unleash the parallelism of 3DIC partitioning on GPGPU

Hsien Kai Kuo*, Bo-Cheng Lai, Jing Yang Jou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Taking full advantage of 3DIC technology requires innovative EDA tools that can optimize a multi-layered complex system. However, the optimization algorithms on the multi-layered 3DIC are usually computationally expensive. Parallel computing has been considered as a solution to manage the exploding computational requirement of future EDA tools. This paper proposes PP3D, a parallel 3DIC partitioning algorithm. PP3D enhances the execution speed by exposing the parallelism of FM algorithm. It also coordinates the parallel execution to retain the optimization quality. A design methodology is proposed to streamline the optimization from PP3D algorithm to the underlying GPGPU many-core architecture. The results on the ISPD98 benchmark demonstrate an average of 15X runtime speedup, while the maximum speedup can reach 37X.

Original languageEnglish
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2010
Pages127-132
Number of pages6
DOIs
StatePublished - 1 Dec 2010
Event23rd IEEE International SOC Conference, SOCC 2010 - Las Vegas, NV, United States
Duration: 27 Sep 201029 Sep 2010

Publication series

NameProceedings - IEEE International SOC Conference, SOCC 2010

Conference

Conference23rd IEEE International SOC Conference, SOCC 2010
CountryUnited States
CityLas Vegas, NV
Period27/09/1029/09/10

Fingerprint Dive into the research topics of 'Unleash the parallelism of 3DIC partitioning on GPGPU'. Together they form a unique fingerprint.

  • Cite this

    Kuo, H. K., Lai, B-C., & Jou, J. Y. (2010). Unleash the parallelism of 3DIC partitioning on GPGPU. In Proceedings - IEEE International SOC Conference, SOCC 2010 (pp. 127-132). [5784745] (Proceedings - IEEE International SOC Conference, SOCC 2010). https://doi.org/10.1109/SOCC.2010.5784745