Unified FinFET compact model: Modelling trapezoidal triple-gate FinFETs

Juan Pablo Duarte, Navid Paydavosi, Sriramkumar Venugopalan, Angada Sachid, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

22 Scopus citations

Abstract

A unified FinFET compact model is proposed for devices with complex fin cross-sections. It is represented in a normalized form, where only four different model parameters are needed. The proposed model accurately predicts the current-voltage characteristics of different FinFETs structures such as Double-Gate (DG), Cylindrical Gate-All-Around (Cy-GAA), or Rectangular Gate-All-Around (Re-GAA) FinFETs. In addition, for the first time, Trapezoidal Triple-Gate (T-TG) FinFETs are accurately modelled. Short-Channel-Effects (SCE) sub-models have been also implemented in the presented work. The model has been verified with TCAD data.

Original languageEnglish
Title of host publication2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013
Pages135-138
Number of pages4
DOIs
StatePublished - 31 Dec 2013
Event18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 - Glasgow, United Kingdom
Duration: 3 Sep 20135 Sep 2013

Publication series

NameInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Conference

Conference18th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013
CountryUnited Kingdom
CityGlasgow
Period3/09/135/09/13

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    Duarte, J. P., Paydavosi, N., Venugopalan, S., Sachid, A., & Hu, C-M. (2013). Unified FinFET compact model: Modelling trapezoidal triple-gate FinFETs. In 2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013 (pp. 135-138). [6650593] (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). https://doi.org/10.1109/SISPAD.2013.6650593