Ultrathin-body SOI MOSFET for deep-sub-tenth micron era

Yang Kyu Choi; Kazuya Asano; Nick Lindert; Vivek Subramanian; Tsu Jae King; Jeffrey Bokor; Chen-Ming Hu

doi:10.1109/55.841313

Ultrathin-body SOI MOSFET for deep-sub-tenth micron era

Yang Kyu Choi, Kazuya Asano, Nick Lindert, Vivek Subramanian, Tsu Jae King, Jeffrey Bokor, Chen-Ming Hu

International College of Semiconductor Technology

Research output: Contribution to journal › Article

168 Scopus citations

Abstract

A 40-nm-gate-length ultrathin-body (UTB) nMOSFET is presented with 20-nm body thickness and 2.4-nm gate oxide. The UTB structure eliminates leakage paths and is an extension of a conventional SOI MOSFET for deep-sub-tenth micron CMOS. Simulation shows that the UTB SOI MOSFET can be scaled down to 18-nm gate length with <5 nm UTB. A raised poly-Si S/D process is employed to reduce the parasitic series resistance.

Original language	English
Pages (from-to)	254-255
Number of pages	2
Journal	IEEE Electron Device Letters
Volume	21
Issue number	5
DOIs	https://doi.org/10.1109/55.841313
State	Published - 1 May 2000

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10.1109/55.841313

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Choi, Y. K., Asano, K., Lindert, N., Subramanian, V., King, T. J., Bokor, J., & Hu, C-M. (2000). Ultrathin-body SOI MOSFET for deep-sub-tenth micron era. IEEE Electron Device Letters, 21(5), 254-255. https://doi.org/10.1109/55.841313

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