Ultrahigh responsivity and tunable photogain BEOL compatible MoS}_{2} phototransistor array for monolithic 3D image sensor with block-level sensing circuits

Chih Chao Yang, Ping Yi Hsieh, Po Han Chen, Tung Ying Hsieh, Po Tsang Huang, Yu Ting Lin, Chang Hong Shen, Jia Min Shieh, Da Chiang Chang, Wen Kuan Yeh, Meng Chyi Wu, Yi Hsien Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A large-area and scalable monolayer TMD is feasible to employ in monolithic 3D image sensor scheme. For the first time, we represents a prototype MoS2 phototransistor array with ultrahigh responsivity (> 102 AW}) and tunable photogain (102 105) which can be directly implemented on a CMOS circuit connected with BEOL fine-pitch vertical interconnects. Electric gate pulse modulation mitigates photo gating (PG) and persistent photoconductance (PPC) effects from layered semiconductor interface. Both three-order-of-magnitude improvements of response speed and fine-pitch vertical interconnects empower block-level compressive sensing circuits and global image-signal processing for gain control and data compression.

Original languageEnglish
Title of host publication2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728164601
DOIs
StatePublished - Jun 2020
Event2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Honolulu, United States
Duration: 16 Jun 202019 Jun 2020

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2020-June
ISSN (Print)0743-1562

Conference

Conference2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020
CountryUnited States
CityHonolulu
Period16/06/2019/06/20

Keywords

  • image sensor
  • monolithic 3D
  • phototransistor
  • TMD
  • ultrahigh resposivity

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