Ultra-shallow junction and high-k dielectric for Nano CMOS

Kazuo Tsutsui*, Yuichiro Sasaki, Kenta Majima, Yotaro Fukagawa, Issui Aiba, Ryota Higaki, Cheng Guo Jin, Hiroyuki Ito, Bunji Mizuno, Jin Aun Ng, Kiichi Tachi, Jaeyeol Song, Yasuhiro Shiino, Kuniyuki Kakushima, Parhat Ahmer, Hiroshi Iwai

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations


It was shown that the plasma doping method combined with FLA or ASLA is a very promising technique to form ultra-shallow and low-resistive junctions for future Nano-CMOS. We developed the He-PA technique and it was shown to be effective for obtaining shallow Xj and low Rs. The surface amorphous layer produced by the He-PA process plays an important role. The Hall measurements revealed that sheet resistances were governed by sheet charier concentration. The He-PA process was found to contribute to increase sheet charier concentration. However, even if these techniques were used, activation rate under the annealing conditions to keep shallow Xj was still low, thus, further investigation to improve the carrier activation is necessary. The junction leakage for the ultra-shallow P+ /N junctions formed by using the plasma doping was examined, and it was shown to be as low as that formed by the low energy ion implantation. On the other hand, feasibility study of La 2O3 gate oxide has been conducted. With low annealing temperature, an effective mobility over 300 cm2/Vs has been obtained, whereas annealing at higher temperature degrades the mobility. Strong correlation of the mobility and interface states has been observed. Insertion of Y2O3 or SC2O3 at La 2O3/Si interface suppresses the increase of EOT after the annealing, especially for SC2O3. Control of the reaction between La2O3 and Si is the key to implement La 2O3 as a gate oxide.

Original languageEnglish
Title of host publication1st IEEE International Workshop on Nano CMOS, IEEE IWNC 2006
Number of pages13
StatePublished - 2006
Event1st IEEE International Workshop on Nano CMOS, IEEE IWNC 2006 - Mishima, Shizuoka, Japan
Duration: 30 Jan 20061 Feb 2006

Publication series

Name2006 International Workshop on Nano CMOS - Proceedings, IWNC


Conference1st IEEE International Workshop on Nano CMOS, IEEE IWNC 2006
CityMishima, Shizuoka

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