Tunneling gate oxide MOSFET technology

Hisayo Sasaki Momose*, Shin Iichi Nakamura, Yasuhiro Katsumata, Hiroshi Iwai

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Characteristics of direct tunneling gate oxide MOSFETs are described. The effect of the gate leakage current on the MOSFET characteristics becomes small as gate length reduces. Extremely high DC and AC performances were realized using such an ultra-thin oxide down to 1.5 nm. Higher reliability in hot-carrier and TDDB has been also observed.

Original languageEnglish
Title of host publicationEuropean Solid-State Device Research Conference
EditorsH. Grunbacher
PublisherIEEE Computer Society
Pages133-142
Number of pages10
ISBN (Electronic)2863322214
DOIs
StatePublished - 1997
Event27th European Solid-State Device Research Conference, ESSDERC 1997 - Stuttgart, Germany
Duration: 22 Sep 199724 Sep 1997

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Conference

Conference27th European Solid-State Device Research Conference, ESSDERC 1997
CountryGermany
CityStuttgart
Period22/09/9724/09/97

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    Momose, H. S., Nakamura, S. I., Katsumata, Y., & Iwai, H. (1997). Tunneling gate oxide MOSFET technology. In H. Grunbacher (Ed.), European Solid-State Device Research Conference (pp. 133-142). (European Solid-State Device Research Conference). IEEE Computer Society. https://doi.org/10.1109/ESSDERC.1997.194387