A family of new logic circuits, called true-single-phase all-N-logic differential logic (TADL), are proposed and analyzed. The logic circuits are designed with only NMOS devices in the logic tree. Two kinds of sensing techniques are used for improving the speed operation, namely, the balanced sense amplifier for the differential-input TADL and the unbalanced sense amplifier for the single-input TADL. A complex function can be implemented in a TADL gate and high operation speed can be achieved without dc power dissipation. Only a true-single-phase clock is required to form the fully pipelined systems. Simulation results show that circuits designed by the TADL have the advantages of high-speed operation and low power-delay product.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - 1 Jan 1996|
|Event||Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA|
Duration: 12 May 1996 → 15 May 1996