Torus with slotted rings architecture for a cache-coherent multiprocessor

Jen-Hui Chuang*, Wen Chuan Chao

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

4 Scopus citations

Abstract

The slotted ring is a point-to-point unidirectional connection for multiprocessor system which resolves most of the problems associated with the bus system. However, the cycle time of the ring becomes the bottleneck when the system grows. In this paper, torus with slotted rings which is composed of multiple rings is proposed to reduce the cycle time of the resulting system. It is similar to the Wisconsin Multicube built by a grid of buses. The proposed architecture adopts ring-map directory cache coherence scheme to avoid occupying too many rings during invalidating. Through some performance evaluations, it is verified that the torus with slotted rings with ring-map directory scheme is better than the Wisconsin Multicube with pure snooping scheme.

Original languageEnglish
Pages76-81
Number of pages6
StatePublished - 1 Dec 1994
EventProceedings of the 1994 International Conference on Parallel and Distributed Systems - Hsinchu, China
Duration: 19 Dec 199421 Dec 1994

Conference

ConferenceProceedings of the 1994 International Conference on Parallel and Distributed Systems
CityHsinchu, China
Period19/12/9421/12/94

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