Threshold voltage models of the narrow-gate effect in micron and submicron MOSFETs

Steve S. Chung*, Chih Tang Sah

*Corresponding author for this work

Research output: Contribution to journalArticle

9 Scopus citations

Abstract

Modeling of the narrow gate effect on the threshold voltage shift (ΔVT) and the effective channel width (WCE) by Ji and Sah, based on the solution of the Poisson equation for the two-dimensional (2-D) potential distribution using the depletion approximation, has been improved by removing the depletion approximation. A simple two-parameter analytical formula for predicting the threshold voltage shift of a narrow gate MOSFET with gate width (WG) in the micron and submicron ranges, was proposed and tested against 2-D numerical results, showing good accuracy. Both parameters can be extracted easily from the theoretical 2-D computed or experimental drain conductance-gate voltage characteristics. Moreover, the new model shows that the threshold voltage shift of any given MOSFET with a known WCE can be determined based only on one test device. Therefore, in applications, computation time can be reduced considerably by using the proposed analytical formula to compute the threshold voltage of any given MOSFET. The new analysis and model show smaller threshold voltage shift than the Ji-Sah's depletion approximation model as the gate narrows due to the loss of gate induced charge to fringe fields at the gate edges. Comparison of the threshold voltage shift between the new model and Acker's model shows that the inverse relationship between ΔVT and WCE instead of WG accounts for the inaccuracy of the simple charge control model when the gate width is reduced to the submicron range.

Original languageEnglish
Pages (from-to)1009-1021
Number of pages13
JournalSolid State Electronics
Volume31
Issue number6
DOIs
StatePublished - 1 Jan 1988

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