Threshold voltage design and performance assessment of hetero-channel SRAM cells

Vita Pi Ho Hu*, Ming Long Fan, Pin Su, Ching Te Chuang

*Corresponding author for this work

Research output: Contribution to journalArticle

7 Scopus citations

Abstract

Optimized threshold voltage (Vt) design to enhance the variation immunity of high-performance (super-threshold) and low-voltage (near-/sub-threshold) 6 T SRAM cells is presented. For low-voltage SRAM cells operating at low Vdd, low-Vt design shows smaller variability, while the design tradeoff between performance and leakage should be considered. For high-performance SRAM cells operating at high Vdd, ultra-thin-body SOI SRAM cells with high-Vt design show smaller variability while sacrificing performance compared with the low-Vt design. Our study indicates that hetero-channel SRAM cells enable high-Vt design and exhibit improved Read/Write stability and performance, and maintain comparable RSNM variations for the high-performance SRAM applications.

Original languageEnglish
Article number6376153
Pages (from-to)147-152
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume60
Issue number1
DOIs
StatePublished - 1 Jan 2013

Keywords

  • Hetero-channel
  • SRAM
  • performance
  • variability

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