We demonstrate three-dimensional (3-D) self-aligned [IrO2-IrO2-Hf]-LaAlO3-Ge-on-insulator (GOI) CMOSFETs above 0.18-μm Si CMOSFETs for the first time. At an equivalent oxide thickness of 1.4 nm, the 3-D IrO2-LaAlO 3-GOI p-MOSFETs and IrO2-Hf-LaAlO 3-GOI nMOSFETs show high hole and electron mobilities of 234 and 357 cm2/Vs respectively, without depredating the underneath 0.18-μm Si devices. The hole mobility is 2.5 times higher than the universal mobility, at 1 MV/cm effective electric field. These promising results are due to the low-temperature GOI device process, which is well-matched to the low thermal budget requirements of 3-D integration. The high-performance GOI devices and simple 3-D integration process, compatible to current very large-scale integration (VLSI) technology, should be useful for future VLSI.
- Ge-on-insulator (GOI)
- Three-dimensional (3-D)