Thread allocation in chip multiprocessor based multithreaded network processors

Yi Neng Lin; Ying-Dar Lin; Yuan Chen Lai

doi:10.1109/AINA.2008.50

Thread allocation in chip multiprocessor based multithreaded network processors

Yi Neng Lin^*, Ying-Dar Lin, Yuan Chen Lai

^*Corresponding author for this work

Department of Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain modeling and Petri net simulations. The concept of P-M ratio, where P and M indicate the computational and memory access overhead when processing a packet, is introduced and the relation to thread allocation is explored. Results indicate that the demand of threads in a processor diminishes rapidly as P-M ratio increases to 0.066, and decreases slowly afterwards. Observations from a certain P-M ratio can be applied to various software-hardware combinations having the same ratio.

Original language	English
Title of host publication	Proceedings - 22nd International Conference on Advanced Information Networking and Applications, AINA 2008
Pages	718-725
Number of pages	8
DOIs	https://doi.org/10.1109/AINA.2008.50
State	Published - 1 Sep 2008
Event	22nd International Conference on Advanced Information Networking and Applications, AINA 2008 - Gino-wan, Okinawa, Japan Duration: 25 Mar 2008 → 28 Mar 2008

Publication series

Name	Proceedings - International Conference on Advanced Information Networking and Applications, AINA
ISSN (Print)	1550-445X

Conference

Conference	22nd International Conference on Advanced Information Networking and Applications, AINA 2008
Country	Japan
City	Gino-wan, Okinawa
Period	25/03/08 → 28/03/08

Access to Document

10.1109/AINA.2008.50

Link to publication in Scopus

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Lin, Y. N., Lin, Y-D., & Lai, Y. C. (2008). Thread allocation in chip multiprocessor based multithreaded network processors. In Proceedings - 22nd International Conference on Advanced Information Networking and Applications, AINA 2008 (pp. 718-725). [4482777] (Proceedings - International Conference on Advanced Information Networking and Applications, AINA). https://doi.org/10.1109/AINA.2008.50

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title = "Thread allocation in chip multiprocessor based multithreaded network processors",

abstract = "This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain modeling and Petri net simulations. The concept of P-M ratio, where P and M indicate the computational and memory access overhead when processing a packet, is introduced and the relation to thread allocation is explored. Results indicate that the demand of threads in a processor diminishes rapidly as P-M ratio increases to 0.066, and decreases slowly afterwards. Observations from a certain P-M ratio can be applied to various software-hardware combinations having the same ratio.",

author = "Lin, {Yi Neng} and Ying-Dar Lin and Lai, {Yuan Chen}",

year = "2008",

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Lin, YN, Lin, Y-D & Lai, YC 2008, Thread allocation in chip multiprocessor based multithreaded network processors. in Proceedings - 22nd International Conference on Advanced Information Networking and Applications, AINA 2008., 4482777, Proceedings - International Conference on Advanced Information Networking and Applications, AINA, pp. 718-725, 22nd International Conference on Advanced Information Networking and Applications, AINA 2008, Gino-wan, Okinawa, Japan, 25/03/08. https://doi.org/10.1109/AINA.2008.50

Thread allocation in chip multiprocessor based multithreaded network processors. / Lin, Yi Neng; Lin, Ying-Dar; Lai, Yuan Chen.

Proceedings - 22nd International Conference on Advanced Information Networking and Applications, AINA 2008. 2008. p. 718-725 4482777 (Proceedings - International Conference on Advanced Information Networking and Applications, AINA).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain modeling and Petri net simulations. The concept of P-M ratio, where P and M indicate the computational and memory access overhead when processing a packet, is introduced and the relation to thread allocation is explored. Results indicate that the demand of threads in a processor diminishes rapidly as P-M ratio increases to 0.066, and decreases slowly afterwards. Observations from a certain P-M ratio can be applied to various software-hardware combinations having the same ratio.

AB - This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain modeling and Petri net simulations. The concept of P-M ratio, where P and M indicate the computational and memory access overhead when processing a packet, is introduced and the relation to thread allocation is explored. Results indicate that the demand of threads in a processor diminishes rapidly as P-M ratio increases to 0.066, and decreases slowly afterwards. Observations from a certain P-M ratio can be applied to various software-hardware combinations having the same ratio.

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Lin YN, Lin Y-D, Lai YC. Thread allocation in chip multiprocessor based multithreaded network processors. In Proceedings - 22nd International Conference on Advanced Information Networking and Applications, AINA 2008. 2008. p. 718-725. 4482777. (Proceedings - International Conference on Advanced Information Networking and Applications, AINA). https://doi.org/10.1109/AINA.2008.50