Thermal simulation and design of a GaAS HBT sample and hold circuit

Ken Poulton*, Knud L. Knudsen, John J. Corcoran, Koh Chung Wang, Richard L. Pierson, Randy B. Nubling, Mau-Chung Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Methods which are used to predict and measure device temperatures within an IC are described, and their application to the design of an HBT (heterojunction bipolar transistor) sample and hold circuit (S/H) is discussed. A new thermal simulation tool called ThCalc is also described. ThCalc calculates the temperature profile of an IC and runs fast enough to allow calculations on a whole chip.

Original languageEnglish
Title of host publicationTechnical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)
PublisherPubl by IEEE
Pages129-132
Number of pages4
ISBN (Print)078030196X
DOIs
StatePublished - 1 Jan 1992
Event13th Annual GaAs IC Symposium Technical Digest - Monterey, CA, USA
Duration: 20 Oct 199123 Oct 1991

Publication series

NameTechnical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Conference

Conference13th Annual GaAs IC Symposium Technical Digest
CityMonterey, CA, USA
Period20/10/9123/10/91

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