Keeping device operating temperatures within reasonable limits is necessary for reliability of all IC's, and important to achieving the expected performance for many IC's. GaAs heterojunction bipolar transistors (HBT's) offer high speed and good device matching characteristics that are attractive for many highspeed circuits, but they are more susceptible than other IC technologies to the unexpected generation of very high junction temperatures. We describe the reasons for this tendency and describe an HBT sample-and-hold (S/H) circuit that had device temperature rises of over 300°C. To address this problem we created a new thermal simulation tool called ThCalc. ThCalc calculates the temperature profile of an IC and runs fast enough to allow calculations on a whole chip. We used ThCalc to redesign the S/H IC to reduce the largest temperature rise by a factor of 2.7 with a minimal impact on circuit size.