Thermal-aware memory management unit of 3D-stacked DRAM for 3D high definition (HD) video

Chih Yuan Chang, Po-Tsang Huang, Yi Chun Chen, Tian-Sheuan Chang, Wei Hwang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

With the increasing resolution of 3D high definition (HD) video, high bandwidth, large capability, low power memory becomes essential. In this paper, a thermal-aware hierarchal memory management unit (MMU) in a 3D-Stacked DRAM model is proposed for 3D HD video systems. By constructing the 4Gb, 4-stack 3D DDR3 DRAM model with through-silicon-vias (TSVs), the data bandwidth can be up to 21.3 GB/s @ 333MHz. Additionally, an efficient address translator, a global rank controller and local slice controllers are proposed in the hierarchal MMU for 3D Full HD video disparity calculation. The hierarchal MMU can improve bandwidth by 54.3% through command reordering and bank/rank interleaving. Moreover, power reduction of up to 43.46% can be realized in low power mode by the dynamic thermal-aware refresh timing control and deep power down detection.

Original languageEnglish
Title of host publicationInternational System on Chip Conference
EditorsRamalingam Sridhar, Danella Zhao, Kaijian Shi, Thomas Buchner
PublisherIEEE Computer Society
Pages76-81
Number of pages6
ISBN (Electronic)9781479933785
DOIs
StatePublished - 5 Nov 2014
Event27th IEEE International System on Chip Conference, SOCC 2014 - Las Vegas, United States
Duration: 2 Sep 20145 Sep 2014

Publication series

NameInternational System on Chip Conference
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Conference

Conference27th IEEE International System on Chip Conference, SOCC 2014
CountryUnited States
CityLas Vegas
Period2/09/145/09/14

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  • Cite this

    Chang, C. Y., Huang, P-T., Chen, Y. C., Chang, T-S., & Hwang, W. (2014). Thermal-aware memory management unit of 3D-stacked DRAM for 3D high definition (HD) video. In R. Sridhar, D. Zhao, K. Shi, & T. Buchner (Eds.), International System on Chip Conference (pp. 76-81). [6948903] (International System on Chip Conference). IEEE Computer Society. https://doi.org/10.1109/SOCC.2014.6948903