The effects of vacuum spacer transistors between high performance and low stand-by power devices beyond 16nm

Jemin Park*, Chen-Ming Hu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

The vacuum spacer transistors are compared with the conventional oxide spacer transistors in both high performance device and low standby power device. In high performance device case, with 14nm vacuum spacers, the CMOS inverter delay, switching charge, and switching energy are reduced by 6.6%, 15.6%, and 19.1%, respectively, compared to oxide spacer. In low standby power device case, with 18nm vacuum spacers, the inverter delay is increased by 10% compared to oxide spacer due to the degradation of on-current.

Original languageEnglish
Title of host publicationICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
Pages1823-1825
Number of pages3
DOIs
StatePublished - 1 Dec 2010
Event2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China
Duration: 1 Nov 20104 Nov 2010

Publication series

NameICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Conference

Conference2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
CountryChina
CityShanghai
Period1/11/104/11/10

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