In sub-micron dual damascene Cu interconnects, electromigration occurs mainly along Cu/SiN cap interface by void migration mechanism. In this study, immersion Sn surface treatment was employed after CMP and before SiN deposition. All the samples, with a line-width of 0.28 μm, were assessed by package level electromigration tests at 300°C under a current density of 3.6×106 A/cm2. We found that Sn surface treatment effectively introduces the Cu-Sn bonding to the Cu/dielectric interface and has influenced electromigration along the Cu/dielectric interfaces. Failure analysis shows that the samples with immersion Sn process have a median-time-to-failure almost 1 order of magnitude larger than the standard dual damascene samples. A careful characterization utilizing FIB and SEM cross-sectional images shows that the failure mechanism has changed due to immersion Sn surface treatment. After electromigration-induced void nucleation, its movement is blocked by the strong Cu-Sn bonding so that its growth is localized and occurs along grain boundaries. With the increased impedance to surface diffusion, failure analysis seems to indicate that grain boundary diffusion now participates in the void movement and growth, which is proposed to be the reason for the increased lifetime.